Exception generation on CoProcessor condition

NAME
	cpTRAPcc -- Exception generation on coprocessor condition

SYNOPSIS
	cpTRAPcc
	cpTRAPcc	#<data>

	No size specs, or size of data: (Word, Long).

FUNCTION
	If specified coprocessor condition is true, exception vector n7
	is generated. Value of saved PC is next instruction one (return
	address).
	If given condition is false, PC takes the value of next instruction.
	Immediate data placed at instruction end is an information which can
	be used by the exception sub-routine.

FORMAT
	-----------------------------------------------------------------
	|15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
	|---|---|---|---|-----------|---|---|---|---|---|---|-----------|
	| 1 | 1 | 1 | 1 | CP-ID =! 0| 0 | 0 | 1 | 1 | 1 | 1 |  OP-MODE  |
	|---|---|---|---|-----------|---|---|---|-----------------------|
	| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |COPROSSESSOR CONDITION |
	|---------------------------------------------------------------|
	|              OPTIONAL COPROCESSOR EXTENSION WORD              |
	|---------------------------------------------------------------|
	|                            16 BITS DATA or                    |
	|---------------------------------------------------------------|
	|	          32 BITS DATA (LOW WEIGHT PART)                |
	-----------------------------------------------------------------

OP-MODE
	010->instruction contains a 16 bits operand.
	011->instruction contains a 32 bits operand.
	100->instruction has no operands.

	CP-ID field identify coprocessor (1 to 7). If CP-ID=0,
	"line emulation F" exception is generated.

	"COPROSSESSOR CONDITION" field, specifies condition to test.
	This condition is addressed to coprocessor which, after examining
	this one, address directives to processor in order to execute
	the instruction.

RESULT
	Not affected.

SEE ALSO
	cpDBcc

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